Logic resynthesis to improve the fault tolerance of combinational circuits for single failures
Abstract
Logic resynthesis to improve the fault tolerance of combinational circuits for single failures
Incoming article date: 08.11.2023The paper discusses methods for protecting logical elements of combinational circuits from single failures. Until recently, the problem of creating microelectronic devices resistant to single failures in logic elements was relevant primarily in the military and space industries. In these areas, increased requirements are placed on the fault tolerance of circuits due to the influence of external destabilizing factors. Such factors can be heavy charged particles that affect the operation of logic elements and cause their single failures. Due to the scaling of semiconductor devices, technological standards for the design and manufacture of integrated circuits are changing, and the problem of fault tolerance becomes relevant for devices on the civilian market. The article proposes a technique for resynthesising vulnerable sections of logical combinational circuits. To assess stability, it is proposed to use logical constraints obtained by the resolution method.
Keywords: resynthesis, combinational circuits, reliability, logical correlations, resolution method