Sensitivity CMOS voltage reference to variations of the parameters of elements

Abstract

Sensitivity CMOS voltage reference to variations of the parameters of elements

E.N. Bormontov, E.V. Sukhoteryn, D.V.Kolesnikov, E.V. Nevezhin

Incoming article date: 14.02.2014

The article describes the preparation of the sensitivity of the output voltage for a typical architecture of voltage reference to variations of the parameters of elements. Also considers the main advantages of this approach in the analysis and design of circuits. The article presents the corresponding graphs sensitivities. Based on the findings conclusions about the impact of deviations of circuit elements on the output parameters of the reference voltage was done.

Keywords: Sensitivity, CMOS voltage reference, bias voltage, group bias